![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Tuesday , February 24, 2009
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
MSI X58 Platinum
Among MSI’s boards supporting the Intel Core i7 CPU, the X58 Platinum seems to have a good mix of features and performance all while being one of the most inexpensive LGA 1366 motherboards you can purchase..
BIOS
MSI chose to use an AMIBIOS style template in designing the X58 Platinum’s BIOS. The BIOS used in testing was version A7522IMS.122.
The Advanced BIOS Features menu contains various settings and submenu contain settings for controlling system initialization, including the PCI Latency Timer setting.
The CPU Feature submenu contains settings for controlling several of the CPU specific internal functions, which include the following: HyperThreading operation control, Execute Disable Bit, CPUID MaxVal, and Overspeed protection. Overspeed Protection prevents the CPU from running faster than its rated speed, which can occur with the Turbo Mode option enabled with EIST enabled.
The Boot Sequence submenu contains the boot device access order for system initialization. All hard drive type devices connected to the system at system boot time will show from the drop down, including properly detected USB 2.0 type devices.
The Integrated Peripherals menu contains settings and submenus with settings for controlling the various integrated system devices. From within the top level menu, you can configure the USB 2.0 port functionality, the Realtek GigE LAN controllers, the IEEE 1394 ports, the JMicron RAID controller base operation, and the Realtek HD audio subsystem.
The Drive Booster Controller #1 submenu contains device specific settings for the JMicron RAID controller. With the option named Extra RAID/IDE Controller enabled in the upper level menu, you have the option of setting the operational mode of connected drives to RAID 0, RAID 1, or standalone mode. Note that this interface does not allow fine adjustment of the RAID settings, and there is no associated RAID boot BIOS for the JMicron controller or connected devices.
The On-Chip ATA Devices submenu controls the operation of the ICH10R RAID controllers, and its associated SATA 2 ports. The On-Chip SATA Controller setting enabled the SATA ports, while the RAID Mode setting determines the port operating mode. Note that the Intel RAID boot BIOS will only show with drives connected to the onboard ICH10R’s SATA 2 ports.
The H/W Monitor menu shows real-time statistics on all BIOS monitored device temperatures voltages, and fan speeds. The base fan speeds for several of the onboard fan headers can be configured via a percentage setting from within this menu as well.
The Cell Menu screen contains various submenus and settings for configuring the board voltages, device speeds, and memory timings, as well as several read-only options showing current device speed settings. The Intel EIST option controls the state of the processor SpeedStep technology, while the Intel C-STATE tech option sets its power usage tendencies while idling. With the Intel EIST option disabled, the CPU multiplier can be manually adjusted via the Adjust CPU Ratio option. When enabled, the Intel Turbo Boost tech setting displays. This option sets the CPU multiplier to the processor default setting when disabled, and boosts the default multiplier by +1 when enabled. The Base Clock (MHz) option determines the base clock frequency for the board, with a settable ceiling of 400MHz. This setting influences the speed of many other board devices, including the processor and memory speeds. The Extreme Memory Profile setting allows for use of BIOS controlled memory optimization for XMP enabled modules. The Memory Ratio option determines the memory speed through the use of multipliers. The physical memory speed can be determined by multiplier the Memory Ratio setting with the Based Clock (MHz) setting.
The Adjust PCI Frequency (MHz) setting sets the base PCI bus frequency, while the PCI-Express bus frequency is configured via the Adjust PCI-E Frequency (MHz) setting. Both settings list static values that are configured by the board independently of the board’s base clock setting. The Auto Disable DRAM/PCI Frequency option disables unused memory and device slots when enabled. The CPU Voltage (V) setting configures the base CPU voltage additively, where the selection is added to the base CPU voltage for the processor in use. This setting allows the CPU voltage to be configured for +0.63V over the default voltage of the in use processor. The CPU PLL Voltage (V) option controls the CPU power regulation circuitry voltage, with a 2.43V maximum allowed. The QPI Voltage (V) setting additively controls the QuickPath Interconnect voltage for the CPU’s internal QuickPath Interconnect bus, with a +0.63V setting over default settable. The DRAM Voltage (V) setting allows for a maximum of 2.77V to be supplied to the in use DDR3 modules. Note that due to the fact that the memory controller is internal for the Core i7 processors, using more than 1.65V could cause permanent internal damage to your costly processor. The DDR_VREF_CA and DDR_VREF_DQ settings configure the control and data reference voltages for the in use modules on a per channel basis. For those configurable options, the settings shown automatically scale with the configured base DRAM voltage. The Northbridge chipset voltage can be set to a 2.37V maximum, while the Southbridge voltage can be set for a 2.13V maximum via the ICH Voltage (V) setting.
The CPU Specifications submenu contains the base CPU settings, including the processor frequency, base multiplier, cache size, current processor voltage, and number of cores. The CPU Technology Support submenu shows what technologies the CPU supports innately.
The QPI Configuration submenu contains all settings related to the QuickPath Interconnect bus. The QPI bus runs at the selected speed with the QPI Links Speed option set to Full-Speed. The QPI Frequency setting controls the physical speed of the QuickPath Interconnect bus, with the speed settings corresponding to bus speed based on the default base clock speed.
The Memory-Z submenu contains a series of submenus corresponding to in use memory slots on the board. The Memory SPD Information submenu for a specific slot contains read-only information concerning the factory pre-set SPD information for the module in question. The XMP Support Information submenu contains further statistics for the module, listing factory pre-set XMP related configuration information specific to the memory module in question.
The Advance DRAM Configuration submenu contains all configurable memory timing related settings, including: command rate (1N/2N Memory Timing); CAS latency; RAS to CAS delay (tRCD); RAS precharge delay (tRP); and active to precharge delay (tRAS). With the Advanced Memory Setting option enabled, the following additional memory timing settings become user accessible: row refresh cycle delay (tRFC); write recovery delay (tWR); write to read delay (tWTR); RAS to RAS delay (tRRD); and read to precharge delay (tRTP). The write to read delay across DIMMs, read to write delay across DIMMS, read to read delay across DIMMS, and write to write delay across DIMMS settings are broken in to three categories: different DIMM modules (DD); same memory chip placement between modules (SR); and different memory chip placement between modules (DR).
The ClockGen Tuner submenu contains settings for configuring the device specific driving clock. The CPU Amplitude Control setting controls the CPU base clock driving control voltage, with a 1000mV maximum setting allowed. Also with a 1000mV maximum setting, the PCI Express Amplitude control sets the PCI Express bus clock driving control voltage. The driving clock delay values for both the CPU and Northbridge are set via the CPU CLK Skew and IOH CLK Skew options, with both settings allowing for a 1500 ps maximum delay.
The User Settings menu allows for storage and retrieval of up to 4 full BIOS setting profiles. For each of the profile slots, the saved settings are for all user settable options within the BIOS itself.
The M-Flash menu allows for BIOS file based updating and archiving. The current BIOS can be archived to a named file on an attached USB drive, or can be updated from a file on an attached USB drive.