![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Wednesday, August 22, 2007
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
GIGABYTE GA-MA69GM-S2H
Don’t let size fool you. GIGABYTE’s latest AM2 based board, the GA-MA69GM-S2H, packs a wallop in its Micro ATX package. It easily stayed with or ahead of the rest of the AM2 crowd, and even managed to close the performance gap with the Intel Core2 based systems.
BIOS (continued)
The Advanced Chipset Features menus contain numerous submenus and options related to chipset setting configuration and overclocking features. The IGX Configuration submenu contains configuration settings for the integrated ATI Radeon x1250 graphics controller. The IGX Engine Clock setting allows for setting of the base controller clock speed from 200MHz to 500MHz. The TV Standard option controls the type of video output sent through the onboard TV output header.
The DRAM Configuration submenu contains all memory related timing and speed settings. The Memory Clock option becomes user configurable with the Set Memory Clock option set to Manual. The memory speed settable via this option is determined through the ratios based on the selected speed setting, with the speed settings based on the default 200MHz CPU bus frequency. The settings listed correspond to the following ratios in the format DDR speed:CPU FSB: DDR 400 – 1:1; DDR 533 – 4:3; DDR 667 – 3:2; DDR 800 – 2:1.
The following memory timing settings become user configurable with the DDRII Timing Items option set to Manual: CAS latency; command rate (shown as 1T/2T Command Timing); write to read command delay (shown as TwTr Command Delay); row refresh cycle delay per DIMM slot (shown as Trfc0 for DIMM1, Trfc1 for DIMM2, Trcf2 for DIMM3, Trfc3 for DIMM4); write recover delay; precharge delay; row cycle delay; RAS to CAS delay; RAS to RAS delay; RAS precharge (shown as Row Precharge time); and active to precharge delay (shown as Minimum RAS Active Time). Note that on most of the listed memory timings options, the numerically lower setting forces more aggressive memory operation.
The HT Link Control submenu contains settings for configuring the HyperTransport bus operation. The overall bandwidth is configured via the HT Link Width setting, with the 16 bit setting giving the best performance. The HT Link Frequency option sets the speed of the bus, with the settings shown corresponding to multipliers based on the default 200MHz CPU FSB speed. The board allows the bus to be set from 200MHz, which is a 1x multiplier, up to a maximum of 1GHz, which corresponds to a 5x multiplier. The bus drive strength settings become accessible with the HT Drive Strength option set to manual, while the receiver control value settings become user accessible with the HT Receiver Ctrl option set to Manual. In both cases, a numerically higher value is the more aggressive setting. The HT PLL Control option sets the speed of the clock generation chip for the HyperTransport bus, with the High Speed setting corresponding to more aggressive behavior.
The CPU Clock Ratio option sets the base CPU multiplier, with a minimum multiplier of 5x which increases in 0.5 increments to the default CPU multiplier. The CPU Frequency(MHz) option, which controls the CPU FSB, becomes user configurable with the CPU Host Clock Control option set to Manual. The BIOS allows for a maximum CPU FSB setting of 500MHz. The physical CPU speed can be calculated by multiplying the CPU Clock Ratio setting with the CPU Host Frequency(MHz) setting.
The voltage for both the Northbridge and Southbridge chipsets is determined through the shared NB/SB Voltage option, which allows for a maximum additive voltage of +0.20V to each base chipset voltage. The DDR2 Voltage Control setting determines the memory voltage again through the use of additive voltage, with a massive +0.60V available. Note that it is highly recommended to use active cooling on your memory modules when using more than the +0.30V voltage setting. The CPU voltage becomes user settable with the CPU Voltage Control option set to Manual. The BIOS allows for a maximum of 1.550V to be supplied to the CPU, which is a high ceiling when using the newer .65nm AM2 CPUs.