![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Wednesday, August 08, 2007
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
ASUS Blitz Extreme
The Blitz Extreme represents a culmination of design and raw processing power for ASUS. The motherboard is a feature rich solution, with many cutting edge technologies including a hybrid water-capable heat-pipe cooling system.
BIOS (continued)
The Extreme Tweaker menu contains all overclocking and memory related configuration options.
The AI Overclocking option determines the user control over the system configuration options. The Auto and Standard settings offer the least amount of user tweaking, while the N.O.S. setting opens up manual configuration of the memory speed and system voltage options. In N.O.S. mode, the system clock speeds are automatically configured by the system using the N.O.S. Mode and Turbo N.O.S. options. The BIOS automatically determines the optimal level of overclocking using the Turbo N.O.S. setting, once system usage minimums meet the criteria set by the selected N.O.S. Mode option setting. Setting the AI Overclocking option to Manual allows the end user the greatest latitude for controlling the system frequency and voltage options.
The base CPU speed is controlled through the FSB Frequency option, with a maximum setting of 800MHz. Note that the CPU Frequency option does not have a menu style interface, instead relying on user numeric input for the frequency selection. The PCIE Frequency settings controls the PCI-Express bus speed, with a 150MHz maximum available. The system memory speed is controlled via 2 options, FSB Strap to Northbridge and DRAM Frequency. The FSB Strap to Northbridge option determines the assumed base FSB upon which the speed ratios available within the DRAM Frequency option are determined. Setting the FSB Strap to Northbridge option to Auto forces the BIOS to show most speed ratios, regardless of the base FSB the individual speed is based on.
With the exception of the command rate option, all listed memory timing settings become user accessible with the DRAM Timing Control option set to Manual: command rate, CAS latency; RAS to CAS delay; RAS precharge; active to precharge delay (shown as RAS# Active Time); RAS to RAS delay; row refresh cycle; write recover delay; write to read delay; and read to precharge delay. Note that on most of the listed memory timings options, the numerically lower setting forces more aggressive memory operation.
The CPU Voltage option determines the base CPU voltage, with a 1.90V maximum defined. The CPU Reference Voltage option configures the CPU Vtt voltage via preset ratios. The FSB clock generator chip Vtt voltage is defined via the FSB Termination Voltage option, with a massive 1.80V allowable. The Northbridge voltage can be set to a massive 2.03V maximum using the North Bridge Voltage option.
The North Bridge Voltage Reference option controls the Northbridge chipset specific Vtt voltage setting through the use of ratios based on the North Bridge Voltage option selection. The DRAM Voltage option controls the base voltage supplied to the DDR3 modules sitting in the memory slots, with a more than adequate maximum of 3.04V settable. The DRAM Vtt voltages can be independently set per channel and for the memory controller chip itself via the REF Voltage options listed directly under the DRAM Voltage setting. The South Bridge Voltage option allows for up to 1.225V to be supplied to the Southbridge chipset. The board’s power regulation system itself can be tweaked via the PLL Voltage option. This option determines how much voltage is supplied to power the chips themselves, with a 2.00V ceiling.