![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Thursday , June 14, 2007
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
ASUS P5K3 Deluxe
ASUS jumps full force in to the latest Intel chipset with the P5K3 Deluxe board. Featuring support for the latest technologies, including a 1333MHz CPU FSB and DDR3 memory, this board brings a lot of performance potential to the table.
BIOS (continued)
Accessible via the JumperFree Configuration link within the upper level Advanced menu, the JumperFree Configuration submenu contains voltage and speed related configuration settings.
The AI Overclocking option controls the level of user interaction with the various configuration settings. The Auto and Standard settings are the most restrictive settings, allowing for a minimal amount of user setting configuration. The AI N.O.S. setting opens up manual configuration of the memory speed and system voltage options, with the system clock speeds determined by the system using the N.O.S. Mode and Turbo N.O.S. options. The BIOS automatically determines the desired level of overclocking set within the Turbo N.O.S. setting, once system usage minimums meet the criteria set by the selected N.O.S. Mode option setting. Setting the AI Overclocking option to Manual allows the end user the greatest latitude for controlling the system frequency and voltage options.
The FSB Frequency option controls the speed of the base CPU FSB, with a maximum setting of 800MHz. Note that the CPU Frequency option does not have a menu style interface, instead relying on user numeric input for the frequency selection. The PCI Express Frequency option configures the PCI Express bus speed, with a 150MHz maximum selectable. The DRAM Frequency option configures the base memory speed, with the settings shown reflecting actual memory speeds based on the currently active FSB Frequency setting, rather than based on a pre-selected FSB default speed.
With the DRAM Timing Control option set to Manual, the following memory timing options can be user configured: CAS latency; RAS to CAS delay; RAS precharge; active to precharge delay; write recover delay (shown as TWR); row refresh cycle delay (shown as TRFC); write to read delay (shown as TWTR); RAS to RAS delay (shown as TRRD); and read to precharge delay (shown as TRTP). Note that on most of the listed memory timings options, the numerically lower setting forces more aggressive memory operation.
The base CPU voltage is controlled via the CPU Voltage option. This option allows for a maximum voltage of 1.700V, which requires the use of a premium cooling system. The CPU Reference Voltage option configures the CPU Vtt voltage through the use of ratios based on the current CPU Voltage option selection. The CPU PLL Voltage option sets the voltage supplied to the CPU FSB speed apparatus, with a maximum of 1.80V settable.
The DRAM Voltage option sets the voltage used for the DDR3 modules sitting in the memory slots, with a maximum of 2.25V allowed. The FSB Termination Voltage option configures the Vtt voltage for the board clock generation mechanism, with a 1.50V maximum setting allowed. The North Bridge Voltage option sets the Northbridge chipset base voltage, with an allowed 1.70V maximum. The North Bridge Voltage Reference option controls the Northbridge chipset specific Vtt voltage setting through the use of ratios based on the North Bridge Voltage option selection. The South Bridge Voltage option allows for up to 1.20V to be sent through the Southbridge chipset.