EVGA nForce 680i LT SLI

EVGA’s nForce 680i LT SLI “Designed by NVIDIA” motherboard uses the latest NVIDIA chipset supporting Intel’s Core 2 processor line. It is being targeted as a budget solution with teeth, and that is exactly what it seems to be.

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BIOS

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The nForce 680i LT SLI’s BIOS is based on the popular Phoenix AwardBIOS design. The BIOS version used in testing was version N680SDQ6.f3.

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The Advanced BIOS Features menu contains system initialization related settings, including those concerning hard disk access order. With a USB 2.0 device properly detected at system boot time, the device shows as a selectable device within the Hard Disk Boot Priority submenu. Priority of devices listed in this submenu can be changed using either the + and – keys or the PageUp and PageDown keys.

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The Advanced Chipset Features menu contains settings for configuring board voltages and bus speed and timing operation split in to several submenus. The NVMEM memory test option, located in the top level menu, is used to configure the internal chipset memory testing facility which can be triggered to run at system startup. This setting controls the length and thoroughness of the memory test administered. Through the Load timing/voltage set and Save timing/voltage set options, you have the ability to manipulate up to 3 custom BIOS configurations. The HPET Function option controls the timer used for system events. When enabled, the chipset specific High Precision Event Timer (HPET) is used, whereas the APIC timer is used when disabled. The NVIDIA GPU Ex option enables a chipset specific option that controls automatic performance tuning between the chipset and specific NVIDIA graphics cards that support the NVIDIA GPU Ex feature.

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The FSB & Memory Config submenu allows for user configuration of the memory and CPU FSB speeds, with memory specific timing configuration done through the Memory Timing Setting submenu. The SLI-Ready Memory option controls NVIDIA specific chipset related memory performance tuning allowing for automatic system memory configuration. Note that this option only works with SLI enabled modules, which contain factory configured CPU FSB based performance settings. The option itself allows for user selection of pre-defined overclocking options by percentage, or manual configuration using the Expert setting. The FSB - Memory Clock Mode option controls the relationship between the memory speed and CPU FSB. With Linked mode selected, the memory speed is determined via the CPU FSB via the FSB - Memory Ratio setting. The FSB - Memory Ratio option sets the memory operating speed through the use of ratios, with the ratio listed as memory speed : CPU FSB. The Synced setting sets the memory ratio to 2:1. With the FSB - Memory Clock Mode option set to Unlinked, the CPU FSB and Memory speeds are set independently. The CPU FSB is configured through the FSB (QDR), MHz option, with a maximum settable speed of 2500, which translated to an actual 625MHz bus speed. The MEM (DDR), MHz option controls the system memory speed, with a settable ceiling up to 1400MHz, which is a module running speed of 700MHz.

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The Memory Timing Setting submenu is a central location for all memory timing related configuration options. Manual memory timing calibration can be done with the Memory Timing Setting option set to Expert. The BIOS allows for configuration of the following timing options: CAS latency, RAS to CAS delay (shown as tRCD); RAS precharge delay (shown as tRP); active to precharge delay (shown as tRAS); command rate (shown as Command Per Clock(CMD)); RAS to RAS delay (shown as tRRD); row cycle time (shown as tRC); write recovery time (shown as tWR); write to read delay (shown as tWTR); and refresh period (shown as tREF). Note that on the memory timings listed, the numerically lower setting forces more aggressive memory operation.