![[H]ardOCP](/images/blank.gif){kind=small}
- Date:
- Thursday , September 21, 2006
- Author:
- Morry Teitelman
- Editor:
- Kyle Bennett
- Google +1
ASUS P5W DH Deluxe
The ASUS P5W DH Deluxe motherboard offers full support for both ATI’s CrossFire technology and the Intel Core 2 Duo line of processors through the Intel 975X chipset. With the amazing C2D overclocking reports, this could be the board to beat.
BIOS
For the P5W DH Deluxe, ASUS chose to use an AMIBIOS type design. The BIOS version shown is version 1305.
The Advanced screen in the BIOS contains various submenus for controlling onboard peripherals as well as voltage and speed related options.
The JumperFree Configuration submenu contains all voltage and speed related settings in the BIOS. The options available for configuration changes depending on the selection chosen through the AI Overclocking option, with the Auto setting giving the least amount of configurability and the Manual setting giving the most control. No matter the AI Overclocking option selection made, the Performance Mode option remains visible throughout. This option controls the aggressiveness of internal chipset timing settings, with the Turbo setting giving the most performance and in some cases the least amount of stability. With the AI Overclocking option set to Overclock Profile, only the Overclock Options setting is user configurable. Using this setting, the user has the ability to select the desired level of overclocking through the use of preset speed percentages or physical CPU bus and memory speed settings. The AI N.O.S. setting within the AI Overclocking option gives user access to the N.O.S. related options, with voltage options becoming user configurable as well. In order to access the Sensitivity and Target Frequency options, which control allow user control over the memory and CPU bus speeds, the N.O.S. Mode option must be set to Manual.
With the AI Overclocking option set to Manual, all user configurable frequency and voltage options become viewable. The CPU Frequency option controls the base CPU FSB, with a maximum setting of 550MHz. Note that the CPU Frequency option does not have a menu selection interface, instead relying on user inputted numbers for the frequency selection. The DRAM Frequency option sets the memory speed, with the options listed changing according to what the current CPU Frequency setting is. The DRAM speeds listed are real-time speeds that the board will attempt to run the memory at, rather than speeds based on a default 200 or 266MHz CPU FSB. The PCI Express Frequency option sets the bus speed for the PCI Express bus, with a 150MHz maximum bus speed available. The PCI Clock Synchronization Mode option controls the speed of the PCI bus, with an option to lock the bus down at 33.33MHz.
The Memory Voltage option determines the voltage given to the DDR2 modules, with a maximum of 2.40V settable. The CPU VCore Voltage controls the base CPU voltage, with the voltage minimum and maximum determined by the CPU in use. The option itself allows for a .45V variance between the lower and upper most voltages. The FSB Termination Voltage option sets the CPU’s Vtt voltage, with a 1.50V maximum allowable. The MCH Chipset Voltage controls the Northbridge chipset voltage, with at 1.65V maximum, while the ICH Chipset Voltage allows for a maximum of 1.20V to pass through the Southbridge chipset.
The CPU Configuration submenu within the main Advanced screen contains CPU operation related options, including those for controlling the internal CPU Thermal, C1E, and SpeedStep configuration.
The Advanced Chipset Settings submenu with the main Advanced screen contains various memory timing and PCI Express related settings.
Once the Configure DRAM Timing by SPD option is disabled, all user configurable memory timing options become visible. The following memory timing options are available for configuration: CAS latency; RAS precharge; RAS to CAS delay; active to precharge delay; and write recover delay. Note that on the listed memory timings options, the numerically lower setting forces more aggressive memory operation. The Hyper Path 3 option controls how aggressively the memory bus is accessed, with only enable and disable options available.